Gyeonggi-do, South Korea

Bong Seok Jeon

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Skhynix Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Bong Seok Jeon. Retrieved from https://idiyas.com/inventor/bong-seok-jeon-ntetbbwy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Bong Seok Jeon and Semiconductor Device Innovation.

Introduction

Bong Seok Jeon is an inventor associated with Gyeonggi-do, South Korea, and SK hynix Inc. His patent work concerns semiconductor device fabrication.

Latest Patents

Jeon is named on one patent, titled “Method of Forming Semiconductor Device Including Semiconductor Liner.” The method describes forming a trench in a substrate to define a preliminary active region, then using a heat treatment at 520°C to 580°C to form a buffer layer. A sacrificial layer replaces the buffer layer and is later removed to expose the active region, where a semiconductor liner is formed. This process outlines a sequence for preparing an active region during semiconductor device manufacturing.

Career Highlights

Jeon’s listed patent connects his inventive work with semiconductor fabrication at SK hynix Inc. The disclosed method focuses on processing a substrate and forming a semiconductor liner.

Collaborations

Jeon’s listed coworkers include Ji Yong Kim and Hai Won Kim. Their names are associated with the patent information provided.

Conclusion

Bong Seok Jeon’s patent describes a semiconductor fabrication method involving a heat-treated buffer layer, a sacrificial layer, and a semiconductor liner.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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