This inventor holds 4 USPTO granted patents. Top assignee: Intel Corporation. Active years: 1999-2001.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1999-2001
Title: Bernie B. Hu and Semiconductor Lithography Innovations.
Introduction
Bernie B. Hu is an inventor based in Beaverton, Oregon, whose patent work addresses precision in semiconductor lithography. His disclosed inventions focus on controlling the dimensions of features printed on photoresist-coated semiconductor wafers. Hu is associated with Intel Corporation and holds 4 patents.
Latest Patents
“Reducing the Critical Dimension Difference of Features Printed on a Substrate” describes a method and apparatus for printing vertically and horizontally aligned features with reduced, substantially equal critical dimensions. The process exposes a first wafer region through a pattern transfer tool, then shifts the wafer by different distances along the horizontal and vertical feature axes. The difference between those shifts compensates for dimensional variation as a second region is exposed.
“Method and Apparatus for Performing a Double Shift Print on a Substrate” presents a technique for printing a feature with a reduced critical dimension. The wafer is positioned at a first shifted position and exposed through a pattern transfer tool to define one side of the feature. It is then moved to a second shifted position and exposed again to define the other side.
Career Highlights
Hu’s patent disclosures concern semiconductor manufacturing, particularly lithographic techniques for improving feature-size control. His work describes coordinated wafer positioning and multiple exposures as ways to shape printed features.
Collaborations
Hu’s listed coworkers include Jeffrey G. Lewis and Robert F. Hainsey. His work is associated with Intel Corporation.
Conclusion
Bernie B. Hu’s disclosed inventions apply shifted exposures and positional compensation to address critical-dimension control in semiconductor lithography.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
