San Jose, CA, United States of America

Austin S Tavares

This inventor holds 3 USPTO granted patents. Top assignee: Xilinx, Inc.. Active years: 2013-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Austin S Tavares. Retrieved from https://idiyas.com/inventor/austin-s-tavares

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 66.7

Average Co-Inventor Count = 1.5

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2013-2017

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3 patents (USPTO):Explore Patents

Title: Innovations of Austin S Tavares

Introduction

Austin S Tavares is a notable inventor based in San Jose, CA. He has made significant contributions to the field of memory interfaces and delay line calibration. With a total of 3 patents, Tavares continues to push the boundaries of technology through his innovative ideas.

Latest Patents

One of his latest patents is titled "Effective clamshell mirroring for memory interfaces." This patent describes methods and apparatus for pinning out multiple memory devices using shared conductors and providing multiple chip select signals. This innovation reduces routing congestion and enables the addition of ground vias to minimize crosstalk for address signals. Another significant patent is the "Delay line calibration circuit and method." This approach involves calibrating a delay line with multiple taps by inputting clock signals and aligning output signals to ensure accuracy.

Career Highlights

Austin S Tavares is currently employed at Xilinx, Inc., where he applies his expertise in developing advanced memory solutions. His work has been instrumental in enhancing the performance and efficiency of memory interfaces.

Collaborations

Some of his notable coworkers include Mark A Alexander and Maria George, who contribute to the innovative environment at Xilinx, Inc.

Conclusion

Austin S Tavares exemplifies the spirit of innovation through his patents and contributions to technology. His work continues to influence the field of memory interfaces and calibration methods.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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