San Jose, CA, United States of America

Ashwini Dwarakanath


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 8(Granted Patents)


Company Filing History:


Years Active: 2013-2014

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2 patents (USPTO):Explore Patents

Title: Innovations by Ashwini Dwarakanath

Introduction

Ashwini Dwarakanath is an accomplished inventor based in San Jose, CA. She has made significant contributions to the field of integrated circuits, holding 2 patents that focus on power management and efficiency.

Latest Patents

Her latest patents include a "Method and apparatus for adjusting power consumption level of an integrated circuit." This invention dynamically scales the clock frequency based on real-time power consumption levels. The method adjusts the actual clock frequency to an effective clock frequency, ensuring optimal power usage. Another notable patent is "Realtime power management of integrated circuits," which involves an integrated circuit with multiple functional blocks that monitor power-consuming events. This invention calculates runtime power consumption estimates and adapts power consumption based on predetermined thresholds.

Career Highlights

Ashwini has worked with prominent companies in the tech industry, including Advanced Micro Devices Corporation and ATI Technologies. Her experience in these organizations has allowed her to develop innovative solutions that enhance the performance and efficiency of integrated circuits.

Collaborations

Some of her notable coworkers include Ali Ibrahim and Daniel Parrenas Shimizu, who have collaborated with her on various projects.

Conclusion

Ashwini Dwarakanath's contributions to integrated circuit technology demonstrate her expertise and commitment to innovation. Her patents reflect a deep understanding of power management, which is crucial in today's technology-driven world.

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