This inventor holds 3 USPTO granted patents. Top assignee: Sun Microsystems, Inc.. Active years: 1999-2002.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1999-2002
Title: Ashutosh K Das: Inventor in Microprocessor Circuit Design
Introduction
Ashutosh K Das is an inventor based in Sunnyvale, California, whose patent work addresses circuit design for microprocessors and integrated circuits. His listed inventions focus on multiplexer contention and noise control in dynamic flip-flops. He is associated with Sun Microsystems, Inc.
Latest Patents
One of Das’s patents, “Circuit for Avoiding Contention in One-Hot or One-Cold Multiplexer Designs,” describes a symmetrical circuit design for an n-to-1 transmission-gate multiplexer. It uses consistent NAND-gate logic on the select lines and reverse-polarity control signals to preserve multiplexer functionality while addressing uneven delays and contention risks associated with asymmetrical designs.
Another patent, “Edge-Triggered Dual-Rail Dynamic Flip-Flop with an Enhanced Self-Shut-Off Mechanism,” describes a shut-off circuit that isolates the flip-flop’s output terminals from internal circuitry during part of the evaluation phase. This isolation helps prevent noise and residual charge from affecting output signal levels.
The supplied information lists 3 patents for Das.
Career Highlights
Das’s patent portfolio reflects work on high-performance digital circuit design. The described inventions address timing, signal integrity, and circuit behavior in microprocessor and integrated-circuit applications.
Collaborations
Das’s listed coworkers include Sridhar Narayanan and Anup S Mehta. His work is associated with Sun Microsystems, Inc.
Conclusion
Ashutosh K Das’s documented inventions focus on improving multiplexer symmetry and protecting dynamic flip-flop outputs from unwanted noise, highlighting his contributions to digital circuit design.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile