Ashish Jain

This inventor holds 21 USPTO granted patents and 17 published patent applications and 2 EPO patents. Top assignees: Advanced Micro Devices Corporation, Ati Technologies Ulc. Active years: 2016-2026.

USPTO Granted Patents = 21 (Patent Applications = 17)

% Patents Active = 81.0

EPO Patents = 2 (Patent Applications = 12)

Average Co-Inventor Count = 3.3

ph-index = 3

Forward Citations = 23(Granted Patents)

Company Filing History:

21 out of 13,146

Advanced Micro Devices Corporation

where one patent can have more than one assignee

Years Active: 2016-2026

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21 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12737032 - Storing contiguous display content in each DRAM for idle static screen power saving (2026-09-15),

2. 12651584 - Power management of display data during an idle screen (2026-06-09),

3. 12614420 - Power management based on frame slicing (2026-04-28),

4. 12596394 - Systems and methods for enabling a feature of a semiconductor device (2026-04-07),

5. 12556170 - Leveraging an adaptive oscillator for fast frequency changes (2026-02-17),

6. 12504909 - Memory power performance state optimization during image display (2025-12-23),

7. 12436696 - On-demand regulation of memory bandwidth utilization to service requirements of display (2025-10-07),

8. 12332722 - Latency reduction for transitions between active state and sleep state of an integrated circuit (2025-06-17),

9. 12278638 - Droop detection and control of digital frequency-locked loop (2025-04-14),

10. 12164365 - Buffer display data in a chiplet architecture (2024-12-10),

11. 12164353 - Frequency/state based power management thresholds (2024-12-10),

12. 12073806 - Refreshing displays using on-die cache (2024-08-27),

13. 11899520 - Dynamic cache bypass for power savings (2024-02-13),

14. 11462294 - Mission mode Vmin prediction and calibration (2022-10-04),

15. 10151786 - Estimating leakage currents based on rates of temperature overages or power overages (2018-12-11),

Title: Ashish Jain - Innovator Extraordinaire from Austin, TX

Introduction:

Ashish Jain, a prolific inventor hailing from Austin, TX, has made significant contributions to the field of technology with a total of 9 patents to his name. His innovative spirit and dedication have led to groundbreaking advancements in the realm of integrated circuits.

Latest Patents:

1. Dynamic cache bypass for power savings: Jain's patented technique involves efficiently operating a cache by powering it down in response to a power trigger, enhancing power savings.

2. Mission mode Vmin prediction and calibration: This patent focuses on adjusting the low end operating voltage of an integrated circuit by utilizing a prediction model based on device degradation data and SRAM low end operating voltage data, optimizing processor performance.

Career Highlights:

Ashish Jain's expertise has been honed through his tenure at renowned companies such as Advanced Micro Devices (AMD) and ATI Technologies ULC. His innovative mindset and technical prowess have been instrumental in driving technological advancements within these organizations.

Collaborations:

During his career, Jain has collaborated with esteemed industry experts such as Alexander J Branover and Samuel D Naffziger. Together, they have worked on cutting-edge projects that have reshaped the landscape of integrated circuit technology.

Conclusion:

In conclusion, Ashish Jain stands as a testament to the power of innovation and dedication in the world of technology. His patents and collaborative efforts have not only propelled technological advancements but have also inspired a new generation of inventors to push the boundaries of what is possible in the realm of integrated circuits.