CA

Arun Achyuthan


Average Co-Inventor Count = 3.7

ph-index = 1

Forward Citations = 3(Granted Patents)


Location History:

  • Ontario, CA (2014)
  • Stittsville, CA (2023 - 2024)

Company Filing History:


Years Active: 2014-2025

Loading Chart...
4 patents (USPTO):Explore Patents

Title: Innovations of Arun Achyuthan

Introduction

Arun Achyuthan is a notable inventor based in California, recognized for his contributions to the field of memory circuit technology. With a total of four patents to his name, he has made significant advancements in power management modes for multi-bank SRAM.

Latest Patents

One of his latest patents is focused on a bit line pre-charge circuit for power management modes in multi-bank SRAM. This innovation provides systems and methods for controlling the wake-up operation of a memory circuit. The memory circuit is designed to precharge the bit lines of a memory array sequentially during wakeup. A sleep signal is received by the first bit line of a memory cell, followed by a designed delay before the precharge of a second complementary bit line occurs. The sleep signal can also precharge the bit lines of a second memory cell with further delay between the precharge of each bit line. Additionally, the memory circuit is configured to precharge both bit lines of a memory cell simultaneously when an operation associated with that cell is designated.

Career Highlights

Arun Achyuthan is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he continues to innovate in the field of semiconductor technology. His work has been instrumental in enhancing the efficiency and performance of memory circuits.

Collaborations

Some of his notable coworkers include Atul Katoch and Sanjeev Kumar Jain, who have collaborated with him on various projects within the company.

Conclusion

Arun Achyuthan's contributions to memory circuit technology and his innovative patents highlight his role as a significant inventor in the field. His work continues to influence advancements in power management for memory systems.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…