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For the Inventor, By the Inventor

Poughkeepsie, NY, United States of America

Arthur J O'Neill, Jr

This inventor holds 30 USPTO granted patents and 2 published patent applications, primarily in Cache Memory Management. Top assignee: International Business Machines Corporation. Active years: 2012-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Arthur J O'Neill, Jr. Retrieved from https://idiyas.com/inventor/arthur-j-o-neill-jr

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 30 

% Patents Active = 16.7

Average Co-Inventor Count = 3.8

ph-index = 4

Forward Citations = 81(Granted Patents)


Company Filing History:

goldMedal30 out of 166,425 
 
International Business Machines Corporation
 patents

Years Active: 2012-2019

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Areas of Expertise:
Cache Line Arbitration
Multiprocessor Cache
Dynamic Cache Management
Error Correction
EDRAM Refresh
Memory Operations
Dataflow Management
Cache Buffer Management
Pipeline Monitoring
Dynamic Resource Reservation
Performance Optimization
Cache Purge
30 patents (USPTO):Explore Patents
1. 10310982 - Target cache line arbitration within a processor cluster (2019-06-04),
2. 10169260 - Multiprocessor cache buffer management (2019-01-01),
3. 9892067 - Multiprocessor cache buffer management (2018-02-13),
4. 9703661 - Eliminate corrupted portions of cache during runtime (2017-07-11),
5. 9678848 - Eliminate corrupted portions of cache during runtime (2017-06-13),
6. 9645904 - Dynamic cache row fail accumulation due to catastrophic failure (2017-05-09),
7. 9600361 - Dynamic partial blocking of a cache ECC bypass (2017-03-21),
8. 9600360 - Dynamic partial blocking of a cache ECC bypass (2017-03-21),
9. 9594689 - Designated cache data backup during system operation (2017-03-14),
10. 9558119 - Main memory operations in a symmetric multiprocessing computer (2017-01-31),
11. 9535787 - Dynamic cache row fail accumulation due to catastrophic failure (2017-01-03),
12. 9507660 - Eliminate corrupted portions of cache during runtime (2016-11-29),
13. 9489255 - Dynamic array masking (2016-11-08),
14. 9459951 - Dynamic cache row fail accumulation due to catastrophic failure (2016-10-04),
15. 9189415 - EDRAM refresh in a high performance cache architecture (2015-11-17),

Title: The Innovative Mind of Arthur J O'Neill, JR

Introduction:

Arthur J O'Neill, JR is a distinguished inventor hailing from Poughkeepsie, NY. His creative spirit and passion for innovation have led to groundbreaking contributions in the field of technology.

Latest Patents:

Arthur J O'Neill, JR holds several patents in various technological domains, showcasing his versatility and ingenuity in inventing cutting-edge solutions for complex problems.

Career Highlights:

Throughout his illustrious career, Arthur J O'Neill, JR has been at the forefront of technological advancements. His work has revolutionized industries and paved the way for future innovations.

Collaborations:

Arthur J O'Neill, JR has collaborated with leading tech companies and research institutions to bring his ideas to life. His ability to work in multidisciplinary teams has resulted in the development of groundbreaking technologies.

Conclusion:

In conclusion, Arthur J O'Neill, JR stands as a visionary inventor whose relentless pursuit of innovation has left an indelible mark on the technological landscape. His contributions continue to inspire future generations of inventors and innovators.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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