This inventor holds 1 USPTO granted patent. Top assignee: Qualcomm Incorporated. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Arnav Ballani: Innovator in Machine Learning for Netlist Design
Introduction
Arnav Ballani is a prominent inventor based in San Diego, California. He has made significant contributions to the field of electronic circuit design through his innovative patent. His work focuses on utilizing machine learning techniques to enhance the evaluation of electronic circuit designs.
Latest Patents
Arnav Ballani holds a patent for "Machine learning for netlist design." This patent outlines techniques and apparatus for evaluating electronic circuit designs. The invention involves accessing a directed graph representing a netlist design, which includes various electronic components and their connections. A node corresponding to a register is selected, and a subgraph is generated based on the directed graph. This subgraph identifies a connectivity cone ending at the first register. A functional embedding is created for the subgraph using a trained encoder machine learning model. Ultimately, a predicted performance characteristic of the netlist design is generated based on the functional embedding. He has 1 patent to his name.
Career Highlights
Arnav Ballani is currently employed at Qualcomm Incorporated, a leading technology company known for its advancements in telecommunications and semiconductor technology. His role at Qualcomm allows him to apply his innovative ideas in a practical setting, contributing to the development of cutting-edge technologies.
Collaborations
Arnav collaborates with Gokce Sarar, a fellow innovator in the field. Their partnership exemplifies the collaborative spirit of innovation, as they work together to push the boundaries of technology.
Conclusion
Arnav Ballani is a notable inventor whose work in machine learning for netlist design showcases his commitment to advancing electronic circuit evaluation. His contributions are paving the way for future innovations in the field.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
