San Diego, CA, United States of America

Anil Kumar

This inventor holds 2 USPTO granted patents and 4 published patent applications. Top assignee: Murata Manufacturing Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Anil Kumar. Retrieved from https://idiyas.com/inventor/anil-kumar-lvsfgb5f

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Anil Kumar: Semiconductor and Integrated-Circuit Innovations

Introduction

Anil Kumar is an inventor based in San Diego, California, whose patent work addresses ways to increase capacitance and inductance in integrated-circuit designs. His inventions focus on integrating capacitor and inductor structures with chips while managing space, performance, and manufacturing constraints. He is associated with Murata Manufacturing Co., Ltd. His portfolio includes 2 patents.

Latest Patents

Kumar’s listed patents include two approaches to improving the integration of capacitors with integrated circuits.

“Backside deep trench capacitor and inductor structures” describes single-chip structures designed to provide high capacitance or inductance density across applications ranging from DC and sub-kilohertz signals to radio frequencies. The disclosed structures use trenches formed in the substrate’s backside and lined with conductive layers and a dielectric. Electrical connections link those layers to portions of the chip’s metallization, enabling the trench structures to function as capacitors or inductors.

“Integration of discrete embeddable capacitors on integrated circuit chips” presents a method for achieving higher capacitance density while reducing the planar area required on a mounting structure. The approach vertically stacks discrete capacitors onto an integrated-circuit chip and forms electrical connections between them. It is designed to accommodate CMOS fabrication temperatures while allowing the use of capacitors made through processes involving higher temperatures. The patent describes connecting relatively large capacitances, such as approximately 0.5 to 1 microfarad, without increasing the chip’s two-dimensional footprint. Some embodiments also include reconfigurable capacitors or through-vias for connecting circuitry.

Career Highlights

Kumar’s patent work reflects an emphasis on practical integration: placing high-capacitance or high-inductance components within or on an integrated-circuit structure while conserving space. The disclosed techniques address both backside deep-trench structures and vertically stacked discrete capacitors.

Collaborations

Kumar is associated with Murata Manufacturing Co., Ltd. His listed coworker is Shishir Ray.

Conclusion

Anil Kumar’s patents describe complementary strategies for increasing capacitance and inductance density in integrated circuits, combining backside trench structures with vertically integrated discrete capacitors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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