Amit Patankar

Title: Innovations by Inventor Amit Patankar

Introduction

Amit Patankar is an accomplished inventor based in San Jose, CA. He has made significant contributions to the field of technology, particularly in the area of system-level simulation within Network on Chip (NoC) architecture. With a total of 3 patents to his name, Patankar's work has been influential in enhancing the performance of System on Chip (SoC) designs.

Latest Patents

Patankar's latest patents focus on systems and methods for performing multi-message transaction-based performance simulations of SoC IP cores within a NoC interconnect architecture. These innovations accurately imitate full SoC behavior, allowing for simulations that evaluate and detect NoC behavior based on the execution of multiple transactions at varying rates, times, and intervals. Each transaction can contain one or more messages, associated with both source and destination agents. Additionally, messages can be configured with multiple parameters such as rate, size, value, and latency, enabling the simulator to create real-time scenarios for generating performance reports for the NoC interconnect.

Career Highlights

Throughout his career, Amit Patankar has worked with notable companies, including Netspeed Systems. His expertise in system-level simulation has positioned him as a key player in the development of advanced technologies in the semiconductor industry.

Collaborations

Patankar has collaborated with talented professionals in his field, including Sailesh Kumar and Eric Norige. These collaborations have further enriched his work and contributed to the success of his projects.

Conclusion

Amit Patankar's innovative contributions to system-level simulation in Network on Chip architecture demonstrate his expertise and commitment to advancing technology. His patents and collaborations reflect a dedication to improving the performance of SoC designs, making him a notable figure in the field of invention.