Santa Clara, CA, United States of America

Alline F Myers


Average Co-Inventor Count = 4.3

ph-index = 3

Forward Citations = 17(Granted Patents)


Company Filing History:


Years Active: 2002-2007

where 'Filed Patents' based on already Granted Patents

4 patents (USPTO):

Title: Alline F Myers: Innovator in Semiconductor Technology

Introduction

Alline F Myers is a prominent inventor based in Santa Clara, CA (US). She has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. Her work primarily focuses on methods that enhance the fabrication processes in integrated circuits.

Latest Patents

Among her latest patents is a method of using an adhesion precursor layer for chemical vapor deposition (CVD) copper deposition. This innovative method involves providing a gas of material over a dielectric material, followed by the deposition of a copper layer over the adhesion precursor layer. The adhesion precursor layer is formed by the gas, and the dielectric material includes an aperture. Another notable patent is a method for determining pore characteristics in porous materials. This method utilizes atomic force microscopy (AFM) to measure the porosity of nanoporous materials. By creating a surface topology map with sub-atomic resolution, the pore shape and size can be accurately determined.

Career Highlights

Alline F Myers is currently employed at Advanced Micro Devices Corporation, a leading company in the semiconductor industry. Her work at AMD has been instrumental in advancing technologies that are critical for modern electronic devices.

Collaborations

Throughout her career, Alline has collaborated with notable professionals in her field, including Paul Raymond Besser and Sergey D Lopatin. These collaborations have further enriched her research and development efforts.

Conclusion

Alline F Myers stands out as a key figure in semiconductor innovation, with her patents reflecting her expertise and commitment to advancing technology. Her contributions continue to shape the future of integrated circuit fabrication.

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