Mountain View, CA, United States of America

Ali Kiaei

This inventor holds 1 USPTO granted patent. Top assignee: Anadigics, Inc.. Active years: 2005.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ali Kiaei. Retrieved from https://idiyas.com/inventor/ali-kiaei-o1tvvckq

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2005

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1 patent (USPTO):Explore Patents

Title: Ali Kiaei: Innovator in Semiconductor Technology

Introduction

Ali Kiaei is a notable inventor based in Mountain View, CA (US). He has made significant contributions to the field of semiconductor technology, particularly with his innovative designs that enhance device performance.

Latest Patents

Ali Kiaei holds a patent for a "Compact layout for a semiconductor device." This invention includes a semiconductor substrate, an electrode on the upper surface of the substrate, and a set of one or more transistor elements that compactly surround the electrode with a threshold distance. In one embodiment, the set also compactly surrounds a via hole. Additionally, the elements may comprise a bipolar junction transistor with an aggregate emitter length of not less than 10 microns. The device can also be coupled to an RF circuit for power amplification. He has 1 patent to his name.

Career Highlights

Ali Kiaei is currently employed at Anadigics, Inc., where he continues to push the boundaries of semiconductor technology. His work has been instrumental in developing more efficient and compact semiconductor devices.

Collaborations

Throughout his career, Ali has collaborated with talented individuals such as Mehdi Frederick Soltan and Ali Rajaei. These collaborations have fostered innovation and contributed to advancements in their field.

Conclusion

Ali Kiaei is a prominent figure in semiconductor innovation, with a focus on compact device layouts that enhance performance. His contributions are paving the way for future advancements in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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