Austin, TX, United States of America

Alexandre Ardelea

This inventor holds 1 USPTO granted patent. Top assignee: Oracle International Corporation. Active years: 2013.


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2013

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1 patent (USPTO):Explore Patents

Title: Innovations of Alexandre Ardelea

Introduction

Alexandre Ardelea is a notable inventor based in Austin, TX (US). He has made significant contributions to the field of integrated circuit technology. His work focuses on enhancing the efficiency and accuracy of clock analysis systems in integrated circuits.

Latest Patents

One of Alexandre's key patents is titled "Integrated circuit clock analysis with macro models." This innovative system receives a cell library of gates from the integrated circuit and generates a macro model for each gate. Each macro model includes at least one of a nonlinear current source model, an input parasitics model, or a nonlinear capacitors model. The system tunes these macro models and generates a simulation deck from an electrical netlist of the layout of the integrated circuit and the tuned macro models. Subsequently, it performs clock analysis simulation based on the simulation deck. Alexandre holds 1 patent for this invention.

Career Highlights

Alexandre Ardelea is currently employed at Oracle International Corporation, where he continues to innovate and develop advanced technologies. His work at Oracle has positioned him as a key player in the field of integrated circuits.

Collaborations

Throughout his career, Alexandre has collaborated with talented individuals such as Alexander Korobkov and Bogdan Tutuianu. These collaborations have further enriched his work and contributed to the success of his projects.

Conclusion

Alexandre Ardelea's contributions to integrated circuit technology demonstrate his innovative spirit and dedication to advancing the field. His patent on clock analysis systems showcases his expertise and commitment to improving electronic design.

Profile summary based on public USPTO records.
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