San Francisco, CA, United States of America

Alan B Helffrich, Iii

This inventor holds 1 USPTO granted patent. Top assignee: Semiconductor Diagnosis & Test Corporation. Active years: 1995.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Alan B Helffrich, Iii. Retrieved from https://idiyas.com/inventor/alan-b-helffrich-iii

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 58(Granted Patents)


Company Filing History:


Years Active: 1995

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1 patent (USPTO):Explore Patents

Title: Alan B Helffrich, III: Innovator in Semiconductor Failure Analysis

Introduction

Alan B Helffrich, III is a notable inventor based in San Francisco, CA. He has made significant contributions to the field of semiconductor technology, particularly in the area of failure analysis systems. His innovative work has led to advancements that enhance the reliability and efficiency of integrated circuit (IC) products.

Latest Patents

Alan holds a patent for an "Automatic Failure Analysis System." This automated system is designed to identify fabrication defects that lead to the failure of IC products. The system analyzes design information of the product to be tested, identifying electrical node-to-node faults caused by fabrication defects. It further analyzes the circuit to determine the electrical response to input patterns resulting from these faults. A matrix is constructed to relate failure responses to various input patterns as a function of process defects. This response matrix is crucial for identifying the specific fabrication defect. In cases where the response matrix is degenerate, the system utilizes knowledge about the probability of occurrence of various defects to assign probabilities to the node-to-node faults that may generate the output response set. The system then generates a set of test vectors to analyze the product, instructing the IC test system to apply these vectors to the device under test (DUT). The DUT's response to the test vectors is used to identify the fabrication defect responsible for the failure. Additionally, test results from multiple devices can be used to generate statistical measures that improve the manufacturing process, ultimately increasing yield. Alan's innovative approach has led to a patent count of 1 patent.

Career Highlights

Alan is currently associated with Semiconductor Diagnosis & Test Corporation, where he applies his expertise in semiconductor technology. His work focuses on developing systems that enhance the testing and diagnosis of semiconductor devices.

Collaborations

Throughout his career, Alan has collaborated with notable professionals in the field, including John M Caywood and Yervant D Lepejian. These collaborations have contributed to the advancement of semiconductor testing technologies.

Conclusion

Alan B Helffrich, III is a distinguished inventor whose work in automatic failure analysis systems has significantly impacted the semiconductor industry. His innovative solutions continue to enhance the reliability and efficiency of integrated circuit products.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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