Tokyo, Japan

Akitaka Nii

This inventor holds 1 USPTO granted patent and 5 published patent applications. Top assignee: Jsr Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Akitaka Nii. Retrieved from https://idiyas.com/inventor/akitaka-nii

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Akitaka Nii: Innovator in Semiconductor Technology

Introduction

Akitaka Nii is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a unique resist underlayer film-forming composition.

Latest Patents

Akitaka Nii holds a patent for a resist underlayer film-forming composition, which includes a polysiloxane compound and a solvent. This composition is designed for lithography using electron beams or extreme ultraviolet rays. The patent details the structural units and chemical properties that make this composition suitable for advanced semiconductor substrates.

Career Highlights

Akitaka Nii is associated with JSR Corporation, where he has been instrumental in advancing semiconductor materials. His expertise in film-forming compositions has positioned him as a key player in the industry. With a focus on innovation, he continues to contribute to the development of cutting-edge technologies.

Collaborations

Akitaka Nii has worked alongside talented colleagues such as Tomoaki Seko and Yusuke Anno. Their collaborative efforts have further enhanced the research and development initiatives at JSR Corporation.

Conclusion

Akitaka Nii's contributions to semiconductor technology through his innovative patents and collaborations highlight his importance in the field. His work continues to influence advancements in lithography and semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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