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For the Inventor, By the Inventor

Kawasaki, Japan

Aiichiro Inoue

This inventor holds 31 USPTO granted patents, plus 2 CIPO patents, primarily in Instruction Processing. Top assignees: Fujitsu Corporation, Fujitsu Semiconductor Limited. Active years: 1989-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Aiichiro Inoue. Retrieved from https://idiyas.com/inventor/aiichiro-inoue

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 31

% Patents Active = 77.4

 

Average Co-Inventor Count = 1.9

ph-index = 9

Forward Citations = 210(Granted Patents)


Location History:

  • Hiratsuka, JP (1989)
  • Yokohama, JP (1994 - 1999)
  • Kanagawa, JP (2002 - 2011)
  • Kawasaki, JP (1995 - 2013)

Company Filing History:

goldMedal31 out of 39,374 
 
Fujitsu Corporation
 patents
silverMedal1 out of 1,674 
 
Fujitsu Semiconductor Limited
 patents
where one patent can have more than one assignee

Years Active: 1989-2013

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Areas of Expertise:
Instruction Control
Branch Prediction
Memory Access
Microprogram
Data Processing
Pipeline Processor
Pre-fetch Control
Virtual Storage
Parallel Operations
Commit Stack
Cache Coherency
Multi-chip Module
31 patents (USPTO):Explore Patents
1. 8464004 - Information processing apparatus, memory control method, and memory control device utilizing local and global snoop control units to maintain cache coherency (2013-06-11),
2. 8446020 - Multi-chip module (2013-05-21),
3. 7925870 - Return target address prediction by moving entry pointer to return stack popped at completion to deeper one at return instruction fetch (2011-04-12),
4. 7765387 - Program counter control method and processor thereof for controlling simultaneous execution of a plurality of instructions including branch instructions using a branch prediction mechanism and a delay instruction for branching (2010-07-27),
5. 7603545 - Instruction control method and processor to process instructions by out-of-order processing using delay instructions for branching (2009-10-13),
6. 7350062 - Predicted return address from return stack entry designated by computation unit with multiple inputs including return hit flag and re-fetch signal (2008-03-25),
7. 7278010 - Instruction execution apparatus comprising a commit stack entry unit (2007-10-02),
8. 7246204 - Pre-fetch control device, data processing apparatus and pre-fetch control method (2007-07-17),
9. 7036003 - Instruction processing device and method for controlling branch instruction accompanied by mode change (2006-04-25),
10. 6993638 - Memory access device and method using address translation history table (2006-01-31),
11. 6912650 - Pre-prefetching target of following branch instruction based on past history (2005-06-28),
12. 6898698 - Device predicting a branch of an instruction equivalent to a subroutine return and a method thereof (2005-05-24),
13. 6851043 - Branch instruction execution control apparatus (2005-02-01),
14. 6789185 - Instruction control apparatus and method using micro program (2004-09-07),
15. 6754814 - Instruction processing apparatus using a microprogram that implements a re-reading operation by controlling early loading of instructions (2004-06-22),

Title: Innovations of Aiichiro Inoue in Information Processing

Introduction

Aiichiro Inoue is a prominent inventor based in Kawasaki, Japan, recognized for his significant contributions to information processing technologies. With an impressive portfolio of 31 patents, Inoue has been instrumental in advancing how data is managed and processed in modern computing systems.

Latest Patents

Among his recent inventions, Inoue's work on an information processing apparatus stands out. This device includes nodes each equipped with main memory and a processor featuring a cache memory, along with a system controller. Notably, the system controller incorporates a holding unit for address information related to primary data in local memory, ensuring that this data is not cached in other nodes' memory. His patents also detail the use of local and global snoop control units designed to maintain cache coherency more efficiently, permitting certain snoop operations to be skipped under specific conditions.

Another cutting-edge invention by Inoue is the multi-chip module, which consists of a board and a wiring pattern. This module effectively connects multiple chips and enables their electrical interconnection through regions outside the wiring pattern, enhancing overall performance and flexibility in chip design.

Career Highlights

Throughout his career, Inoue has worked with leading companies in the tech industry, including Fujitsu Corporation and Fujitsu Semiconductor Limited. His expertise has helped shape various technology development projects, driving innovations in computer memory systems and processing methods.

Collaborations

Inoue has collaborated with notable colleagues such as Masaki Ukai and Ryuichi Sunayama. These partnerships have further enriched his research and development efforts, leading to solutions that continue to impact the technology landscape.

Conclusion

Aiichiro Inoue's contributions to the field of information processing exemplify the potential of innovative thinking in technology. With his extensive patent portfolio and collaborations within the industry, he remains a pivotal figure in the evolution of computing capabilities.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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