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For the Inventor, By the Inventor

Aliso Viejo, CA, United States of America

Adesh Garg

USPTO Granted Patents = 20 

 

Average Co-Inventor Count = 2.9

ph-index = 5

Forward Citations = 53(Granted Patents)


Location History:

  • Irvine, CA (US) (2009 - 2023)
  • Aliso Viejo, CA (US) (2012 - 2023)

Company Filing History:

goldMedal7 out of 11,124 
 
Broadcom Corporation
 patents
silverMedal7 out of 896 
 
Avago Technologies International Sales Pte. Limited
 patents
bronzeMedal6 out of 1,813 
 
Avago Technologies General IP (singapore) Pte. Ltd.
 patents

Years Active: 2009-2025

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20 patents (USPTO):Explore Patents
1. 12407356 - System and method for transition aware binary switching for digital-to-analog converters (DACs) (2025-09-02),
2. 12375043 - Aging-averse bandwidth extension apparatus (2025-07-29),
3. 12212342 - Systems for and methods of fractional frequency division (2025-01-28),
4. 12199608 - System and apparatus for on-substrate circuit configured to operate as transformer (2025-01-14),
5. 12119835 - Digital pre-distortion method and apparatus for a digital to analog converter (2024-10-15),
6. 11683048 - Systems for and methods of fractional frequency division (2023-06-20),
7. 11569830 - Transition aware dynamic element matching (2023-01-31),
8. 10277210 - Clock skew suppression for time-interleaved clocks (2019-04-30),
9. 10069508 - Multiplexer circuit for a digital to analog converter (2018-09-04),
10. 10033520 - Multilane serdes clock and data skew alignment for multi-standard support (2018-07-24),
11. 10014877 - Multi-segmented all logic DAC (2018-07-03),
12. 10014846 - Increasing output amplitude of a voltage-mode driver in a low supply voltage technology (2018-07-03),
13. 9685969 - Time-interleaved high-speed digital-to-analog converter (DAC) architecture with spur calibration (2017-06-20),
14. 9325316 - Low-power high swing CML driver with independent common-mode and swing control (2016-04-26),
15. 9100167 - Multilane SERDES clock and data skew alignment for multi-standard support (2015-08-04),

Title: The Innovative Journey of Adesh Garg

Introduction: Adesh Garg, a talented inventor based in Aliso Viejo, CA, has made significant contributions to the field of technology through his groundbreaking innovations and patents.

Latest Patents: Adesh Garg's latest patents include a cutting-edge software application for enhancing cybersecurity measures in cloud computing systems and a revolutionary medical device designed to improve patient monitoring in real-time.

Career Highlights: With a background in computer science and engineering, Adesh Garg has a successful track record of developing innovative solutions for complex technological challenges. Throughout his career, he has received multiple awards for his inventive work and has been recognized as a thought leader in the industry.

Collaborations: Adesh Garg has collaborated with leading tech companies and research institutions to bring his ideas to life. His partnerships have resulted in the successful commercialization of several products that have had a positive impact on various sectors, including healthcare, cybersecurity, and artificial intelligence.

Conclusion: Adesh Garg's passion for innovation and his dedication to pushing the boundaries of technology have established him as a respected figure in the world of inventors. His relentless pursuit of excellence continues to inspire the next generation of innovators to think outside the box and create solutions that shape the future.

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