Round Rock, TX, United States of America

A James Van Norstrand, Jr

This inventor holds 6 USPTO granted patents. Top assignee: International Business Machines Corporation. Active years: 1997-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: A James Van Norstrand, Jr. Retrieved from https://idiyas.com/inventor/a-james-van-norstrand-jr

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 6

% Patents Active = 66.7

Average Co-Inventor Count = 3.8

ph-index = 4

Forward Citations = 69(Granted Patents)

Company Filing History:

6 out of 166,351

International Business Machines Corporation

patents

Years Active: 1997-2020

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6 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10552165 - Efficiently managing speculative finish tracking and error handling for load instructions (2020-02-04),

2. 10423423 - Efficiently managing speculative finish tracking and error handling for load instructions (2019-09-24),

3. 6061785 - Data processing system having an apparatus for out-of-order register (2000-05-09),

4. 6035394 - System for providing high performance speculative processing of complex (2000-03-07),

5. 5850542 - Microprocessor instruction hedge-fetching in a multiprediction branch (1998-12-15),

6. 5634119 - Computer processing unit employing a separate millicode branch history (1997-05-27),

Title: A James Van Norstrand, Jr: Innovator in Processor Technology

Introduction

A James Van Norstrand, Jr. is a notable inventor based in Round Rock, TX (US). He has made significant contributions to the field of processor technology, holding a total of 6 patents. His work focuses on improving the efficiency of load instructions within processors, showcasing his expertise and innovative thinking.

Latest Patents

One of his latest patents is titled "Efficiently managing speculative finish tracking and error handling for load instructions." This invention addresses the challenges of tracking speculative finishes of load instructions within a processor. It involves maintaining an oldest load instruction of a thread in a speculative finish table after data is loaded. The process utilizes a particular queue index tag assigned to the oldest load instruction, which points to a specific entry in the speculative finish table. The oldest load instruction is then finished based on the results of an error check code. This innovative approach enhances the reliability and efficiency of processor operations.

Career Highlights

A James Van Norstrand, Jr. is currently employed at International Business Machines Corporation, commonly known as IBM. His role at IBM allows him to further develop his ideas and contribute to cutting-edge technology in the computing industry. His patents reflect his commitment to advancing processor technology and improving performance.

Collaborations

Throughout his career, A James Van Norstrand, Jr. has collaborated with talented individuals such as David Andrew Schroter and Kevin Arthur Chiarot. These collaborations have likely enriched his work and contributed to the innovative solutions he has developed.

Conclusion

A James Van Norstrand, Jr. is a distinguished inventor whose work in processor technology has led to significant advancements. His patents demonstrate his innovative spirit and dedication to improving computing efficiency. His contributions continue to influence the field and inspire future innovations.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]