For the Inventor, By the Inventor

Enter assignee name

San Jose, CA, United States of America

Tortuga Logic Inc.

USPTO Granted Patents = 3

Trademarks = 3

Forward Citations = 9

Loading Chart...

Loading Chart...

6 inventors (with patents filed for the assignee):

Jason K Oberg (3 out of 6 patents)

Ryan Kastner (2 out of 6 patents)

Jonathan Valamehr (2 out of 2 patents)

4. Wei Hu (1 out of 3 patents)

5. Zachary Blair (1 out of 1 patent)

6. Timothy Sherwood (1 out of 8 patents)

3 patents: Sort by Forward Citations

1. 10719631 - Method and system for detecting hardware trojans and unintentional design flaws (2020-07-21),

2. 10558771 - Systems and methods for security and safety fault analysis using information flow (2020-02-11),

3. 10289873 - Generating hardware security logic (2019-05-14),

Company Badge

USPTO Data Jan 1 1976 - Dec 23 2025

3 Patents

#944 in San Jose, CA

#16,411 in California

#71,950 in US

San Jose, CA, United States of America

Tortuga Logic Inc.

Forward Citations = 9

6 inventors:

Jason K Oberg (3 out of 6 patents)

Ryan Kastner (2 out of 6 patents)

Jonathan Valamehr (2 out of 2 patents)

4. Wei Hu (1 out of 3 patents)

5. Zachary Blair (1 out of 1 patent)

Please report any incorrect information to support@idiyas.com

Loading…