The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2020
Filed:
Jun. 30, 2017
Tortuga Logic Inc., San Diego, CA (US);
Zachary Blair, San Diego, CA (US);
Jason K. Oberg, San Diego, CA (US);
Jonathan Valamehr, San Diego, CA (US);
Tortuga Logic Inc., San Jose, CA (US);
Abstract
The present disclosure includes systems and methods relating to information flow and analyzing faults in integrated circuits for digital devices and microprocessor systems. In general, one implementation, involves a technique including: receiving a hardware design specifying an implementation for information flow in a hardware configuration; receiving one or more labels annotating the hardware design; receiving one or more fault properties specifying at least a fault type relating to the one or more labels for implementing an information flow model indicating a fault path in the hardware configuration; determining, for each of the one or more fault properties, a label value by translating the fault property into the information flow model; and automatically assigning a respective label value to each of the one or more labels in the hardware design.