Trademarks = 4

Forward Citations = 4

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5 inventors (with patents filed for the assignee):

Radoslav Danilak (6 out of 140 patents)

William Henry Radke (1 out of 188 patents)

Rodney Mullendore (1 out of 1 patent)

4. Chi To (1 out of 1 patent)

5. Radoslav Danilak (1 out of 1 patent)

7 patents: Sort by Forward Citations

1. 12211577 - Layout for dual in-line memory to support 128-byte cache line processor (2025-01-28),

2. 11846974 - Arithmetic logic unit layout for a processor (2023-12-19),

3. 11755528 - System and method of populating an instruction word (2023-09-12),

4. 11403254 - System and method for populating multiple instruction words (2022-08-02),

5. 11379406 - Arithmetic logic unit layout for a processor (2022-07-05),

6. 11144497 - System and method of populating an instruction word (2021-10-12),

7. 10915324 - System and method for creating and executing an instruction word for simultaneous execution of instruction operations (2021-02-09),

Company Overview

Tachyum is a semiconductor company that is developing innovative solutions for data center and AI workloads. Their products aim to deliver unprecedented performance and efficiency, revolutionizing the industry with innovative technologies. The company is focused on creating high-performance chips that are smaller, faster, and more power-efficient than existing solutions.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

7 Patents

#648 in San Jose, CA

#9,508 in California

#39,929 in US

San Jose, CA, United States of America

Tachyum Ltd.

Forward Citations = 4

5 inventors:

Radoslav Danilak (6 out of 140 patents)

William Henry Radke (1 out of 188 patents)

Rodney Mullendore (1 out of 1 patent)

4. Chi To (1 out of 1 patent)

5. Radoslav Danilak (1 out of 1 patent)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Tachyum Ltd.. Retrieved from https://idiyas.com/company/tachyum

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]