San Jose, CA, United States of America

Chi To


Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: The Innovative Mind of Chi To

Introduction

Chi To is a notable inventor based in San Jose, California. He has made significant contributions to the field of computer memory technology. His work has led to the development of innovative solutions that enhance the performance of processors in computers.

Latest Patents

Chi To holds a patent for a "Layout for dual in-line memory to support 128-byte cache line processor." This invention involves a memory stick designed for use with a computer processor. The memory stick features a printed circuit board with two sides, each containing eighteen ×8 DRAM memory chips. These chips are organized into four rows, with the first two rows located on the left half of the board and the other two on the right. The board includes at least 400 pins, which consist of 16 pins for ECC bits and 128 pins for data bits. This configuration allows for a 128-bit data width for communication, significantly improving data processing capabilities.

Career Highlights

Chi To is currently employed at Tachyum Ltd., where he continues to push the boundaries of memory technology. His work at Tachyum has positioned him as a key player in the development of advanced computing solutions.

Collaborations

Chi To has collaborated with notable colleagues, including Radoslav Danilak and Rodney Mullendore. Their combined expertise has contributed to the success of various projects within the company.

Conclusion

Chi To's innovative contributions to memory technology exemplify the impact of dedicated inventors in the tech industry. His patent and ongoing work at Tachyum Ltd. highlight his commitment to advancing computer performance.

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