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Sunnyvale, CA, United States of America

Synplicity, Inc.

USPTO Granted Patents = 55

% Expired Patents = 1.8

Trademarks = 4

Forward Citations = 1,922

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31 inventors (with patents filed for the assignee):

Kenneth S McElvain (35 out of 106 patents)

John Mark Beardslee (11 out of 43 patents)

Nils Endric Schubert (11 out of 15 patents)

4. Robert J Erickson (6 out of 13 patents)

5. Douglas L Perry (6 out of 8 patents)

6. Drazen Borkovic (4 out of 11 patents)

7. Chun Kit Ng (4 out of 11 patents)

8. Mario Larouche (4 out of 11 patents)

9. Gernot Heinrich Koch (4 out of 5 patents)

10. Vijay Seshadri (3 out of 7 patents)

11. Olaf Poeppe (3 out of 3 patents)

12. Champaka Ramachandran (2 out of 4 patents)

13. Andrew Crews (2 out of 4 patents)

14. Levent Oktem (2 out of 15 patents)

15. Khalid Rahmat (2 out of 12 patents)

Core Competencies:

Debugging

Circuit Optimization

Thermal Analysis

Integrated Circuits

User Interface

Synthesis

Logic Design

Equivalence Checking

Circuit Partitioning

HDL Compilation

Signal Coupling

Clock Skew

55 patents: Sort by Forward Citations

1. 7398445 - Method and system for debug and test using replicated logic (2008-07-08),

2. 7376919 - Methods and apparatuses for automated circuit optimization and verification (2008-05-20),

3. 7366997 - Methods and apparatuses for thermal analysis based circuit design (2008-04-29),

4. 7356786 - Method and user interface for debugging an electronic system (2008-04-08),

5. 7350173 - Method and apparatus for placement and routing cells on integrated circuit chips (2008-03-25),

6. 7278120 - Methods and apparatuses for transient analyses of circuits (2007-10-02),

7. 7275233 - Methods and apparatuses for designing integrated circuits (2007-09-25),

8. 7263673 - Method and apparatus for automated synthesis and optimization of datapaths (2007-08-28),

9. 7251800 - Method and apparatus for automated circuit design (2007-07-31),

10. 7240303 - Hardware/software co-debugging in a hardware description language (2007-07-03),

11. 7237214 - Method and apparatus for circuit partitioning and trace assignment in circuit design (2007-06-26),

12. 7222315 - Hardware-based HDL code coverage and design analysis (2007-05-22),

13. 7217887 - Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device (2007-05-15),

14. 7213216 - Method and system for debugging using replicated logic and trigger logic (2007-05-01),

15. 7200822 - Circuits with modular redundancy and methods and apparatuses for their automated synthesis (2007-04-03),

Company Overview

Synplicity, Inc., based in Sunnyvale, California, specializes in integrated circuit design, focusing on advanced methodologies for debugging, circuit optimization, and thermal analysis. The company is recognized for its innovative solutions in synthesis, logic design, and equivalence checking, which are essential for the development of high-performance electronic systems. By enhancing user interfaces and streamlining design processes, Synplicity plays a crucial role in the evolution of integrated circuit technology.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

55 Patents

#92 in Sunnyvale, CA

#1,517 in California

#6,460 in US

#12,932 in the World

Sunnyvale, CA, United States of America

Synplicity, Inc.

Forward Citations = 1,922

31 inventors:

Kenneth S McElvain (35 out of 106 patents)

John Mark Beardslee (11 out of 43 patents)

Nils Endric Schubert (11 out of 15 patents)

4. Robert J Erickson (6 out of 13 patents)

5. Douglas L Perry (6 out of 8 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Synplicity, Inc.. Retrieved from https://idiyas.com/company/synplicity

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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