The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2007
Filed:
Feb. 28, 2003
Nils Endric Schubert, Neu-Ulm, DE;
John Mark Beardslee, Menlo Park, CA (US);
Gernot Heinrich Koch, Waghaeusel, DE;
Ewald John Detjens, San Francisco, CA (US);
Nils Endric Schubert, Neu-Ulm, DE;
John Mark Beardslee, Menlo Park, CA (US);
Gernot Heinrich Koch, Waghaeusel, DE;
Ewald John Detjens, San Francisco, CA (US);
Synplicity, Inc., Sunnyvale, CA (US);
Abstract
Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.