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San Jose, CA, United States of America

Sanmina-Sci Corporation

USPTO Granted Patents = 54

% Expired Patents = 44.4

EPO Patents = 2

Trademarks = 24

Forward Citations = 1,050

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64 inventors (with patents filed for the assignee):

George Dudnikov, Jr (8 out of 14 patents)

Andrew Hudz (8 out of 9 patents)

Peter Jeffery (7 out of 7 patents)

4. Franz Gisin (6 out of 8 patents)

5. Paul Sweere (6 out of 15 patents)

6. Anthony Cormick Sharp (6 out of 7 patents)

7. Jonathan Randall Hinkle (6 out of 36 patents)

8. Zia Shariff (5 out of 5 patents)

9. James Weir (4 out of 4 patents)

10. Leonard Selinger (4 out of 4 patents)

11. John Albert Ireland (3 out of 4 patents)

12. David R Porter (3 out of 26 patents)

13. Rony Shachar (3 out of 3 patents)

14. Gregory J Schroeder (3 out of 3 patents)

15. Chi She Chen (2 out of 17 patents)

Core Competencies:

Memory Controller

Volatile Memory

Nonvolatile Memory

Embedded Capacitive Stack

Optical Transceiver

Circuit Board

Transient Protection

Cooling Airflow

Data Storage Device

Rack System

Authentication Device

Optical Pumping

54 patents: Sort by Forward Citations

1. 9390035 - Method and apparatus for supporting storage modules in standard memory and/or hybrid memory bus architectures (2016-07-12),

2. 9161447 - Embedded capacitive stack (2015-10-13),

3. 9158716 - Memory controller supporting concurrent volatile and nonvolatile memory modules in a memory bus architecture (2015-10-13),

4. 9019792 - Fast startup hybrid memory module (2015-04-28),

5. 8842018 - Systems and methods for tracking insertion and removal cycles of optical transceiver modules (2014-09-23),

6. 8713769 - Embedded capacitive stack (2014-05-06),

7. 8667675 - Simultaneous and selective partitioning of via structures using plating resist (2014-03-11),

8. 8656072 - Memory bus architecture for concurrently supporting volatile and non-volatile memory modules (2014-02-18),

9. 8583869 - Memory bus architecture for concurrently supporting volatile and non-volatile memory modules (2013-11-12),

10. 8552867 - Radio frequency identification for collecting stage-by-stage manufacturing and/or post-manufacturing information associated with a circuit board (2013-10-08),

11. 8325554 - Battery-less cache memory module with integrated backup (2012-12-04),

12. 8320116 - Multi-use removable electronic data storage device carrier module (2012-11-27),

13. 8222537 - Simultaneous and selective partitioning of via structures using plating resist (2012-07-17),

14. 8188866 - Circuit board with radio frequency identification for collecting stage-by-stage manufacturing metrics (2012-05-29),

15. 8156640 - Substantially continuous layer of embedded transient protection for printed circuit boards (2012-04-17),

Company Overview

Sanmina-Sci Corporation, headquartered in San Jose, California, specializes in advanced manufacturing and engineering services, focusing on memory bus architecture and related technologies. The company develops and produces a range of solutions including memory controllers, both volatile and nonvolatile memory systems, and embedded capacitive stacks. Additionally, Sanmina is involved in the design and manufacturing of optical transceivers, circuit boards, and transient protection systems, emphasizing innovation in cooling airflow and thermal management.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

54 Patents

#179 in San Jose, CA

#1,545 in California

#6,560 in US

#13,126 in the World

San Jose, CA, United States of America

Sanmina-Sci Corporation

Forward Citations = 1,050

64 inventors:

George Dudnikov, Jr (8 out of 14 patents)

Andrew Hudz (8 out of 9 patents)

Peter Jeffery (7 out of 7 patents)

4. Franz Gisin (6 out of 8 patents)

5. Paul Sweere (6 out of 15 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Sanmina-Sci Corporation. Retrieved from https://idiyas.com/company/sanmina-sci

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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