For the Inventor, By the Inventor

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Santa Clara, CA, United States of America

Parade Technologies, Ltd.

USPTO Granted Patents = 145

EPO Patents = 1

Trademarks = 4

Forward Citations = 579

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167 inventors (with patents filed for the assignee):

Ming Qu (23 out of 36 patents)

Viktor Kremin (20 out of 114 patents)

Andriy Maharyta (16 out of 78 patents)

4. Zhengyu Yuan (14 out of 17 patents)

5. Oleksandr Karpin (10 out of 46 patents)

6. Hongquan Wang (9 out of 11 patents)

7. Kochung Lee (9 out of 13 patents)

8. Roman Ogirko (8 out of 40 patents)

9. Hans Klein (8 out of 47 patents)

10. Quan Yu (8 out of 10 patents)

11. Jonathan R Peterson (8 out of 21 patents)

12. Edward L Grivna (8 out of 60 patents)

13. Jeffrey Tucker (7 out of 7 patents)

14. Patrick N Prendergast (7 out of 39 patents)

15. Massoud Badaye (6 out of 14 patents)

Core Competencies:

Continuous Time Linear Equalizers

Low Power Modes

Adaptive Feed-Forward Equalization

Automatic DC Offset Cancellation

High Speed Data Communication

3D Touch Technology

Capacitive Touch Sensing

Dynamic Power Control

Touch Detection Algorithms

Integrated Display Arrays

Signal Conditioning

Virtual Sensor Mirroring

145 patents: Sort by Forward Citations

1. 12456977 - Continuous time linear equalizers (CTLEs) of data interfaces (2025-10-28),

2. 12449878 - Exiting of low power modes of redrivers and retimers (2025-10-21),

3. 12362970 - Adaptive preset-based feed-forward equalization (2025-07-15),

4. 12278636 - Receiver circuit with automatic DC offset cancellation in display port applications (2025-04-14),

5. 12235781 - Power consumption control for transmitters of retimers in high speed data communication (2025-02-25),

6. 12222611 - Variable pitch fan-out routing for display panels having narrow borders (2025-02-11),

7. 12206409 - Floating voltage suppression in high speed multiplexers (2025-01-21),

8. 12166490 - Controlling duty cycle distortion with digital circuit (2024-12-10),

9. 12137157 - Clock recovery optimization in data interfaces (2024-11-05),

10. 12052020 - Methods and systems for controlling frequency and phase variations for PLL reference clocks (2024-07-30),

11. 12040804 - Methods and systems for controlling frequency variation for a PLL reference clock (2024-07-16),

12. 12003241 - Controlling duty cycle distortion with a mixed-signal circuit (2024-06-04),

13. 11983365 - Methods and systems for determining stylus orientation information (2024-05-14),

14. 11683204 - High speed data links with low-latency retimer (2023-06-20),

15. 11681380 - Adaptive electrode arrangement in a capacitive sense array (2023-06-20),

Parade Technologies, Ltd. is a leading fabless supplier of mixed-signal ICs for display and high-speed interface applications. Established in 2005, Parade's products enable technology companies to deliver state-of-the-art technology solutions in a wide range of markets, including smartphones, tablets, laptops, monitors, TVs, automotive displays, and more. With a commitment to innovation, quality, and customer satisfaction, Parade Technologies has become a trusted partner for many industry-leading companies worldwide.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Dec 23 2025

145 Patents

#33 in Santa Clara, CA

#602 in California

#2,604 in US

#5,467 in the World

Santa Clara, CA, United States of America

Parade Technologies, Ltd.

Forward Citations = 579

167 inventors:

Ming Qu (23 out of 36 patents)

Viktor Kremin (20 out of 114 patents)

Andriy Maharyta (16 out of 78 patents)

4. Zhengyu Yuan (14 out of 17 patents)

5. Oleksandr Karpin (10 out of 46 patents)

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