The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2018
Filed:
Jun. 12, 2014
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Shih-Ming Huang, Kaohsiung, TW;
Chun-Hung Lin, Kaohsiung, TW;
Yi-Ting Chen, Kaohsiung, TW;
Wen-Hsin Lin, Kaohsiung, TW;
Shih-Wei Chan, Kaohsiung, TW;
Yung-Hsing Chang, Kaohsiung, TW;
ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung, TW;
Abstract
The present disclosure relates to a semiconductor package structure and semiconductor process. The semiconductor package includes a first substrate, a second substrate, a die, a plurality of interconnection elements and an encapsulation material. Each of the interconnection elements connects the first substrate and the second substrate. The encapsulation material encapsulates the interconnection elements. The encapsulation material defines a plurality of accommodation spaces to accommodate the interconnection elements, and the profile of each accommodation space is defined by the individual interconnection element, whereby the warpage behavior of the first substrate is in compliance with that of the second substrate during reflow.