The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2018

Filed:

Oct. 11, 2013
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Tzuan-Horng Liu, Longtan Township, TW;

Shih-Wen Huang, Shuishang Township, TW;

Chung-Yu Lu, Hsin-Chu, TW;

Hsien-Pin Hu, Zhubei, TW;

Shang-Yun Hou, Jubei, TW;

Shin-Puu Jeng, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 23/488 (2006.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 21/768 (2006.01); H01L 21/50 (2006.01); H01L 23/52 (2006.01); H01L 23/14 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76805 (2013.01); H01L 23/147 (2013.01); H01L 23/481 (2013.01); H01L 23/49827 (2013.01); H01L 25/0655 (2013.01); H01L 21/486 (2013.01); H01L 23/49816 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/97 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/831 (2013.01); H01L 2224/97 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01);
Abstract

Various embodiments of mechanisms for forming through a three-dimensional integrated circuit (3DIC) structure are provided. The 3DIC structure includes an interposer bonded to a die and a substrate. The interposer has a conductive structure with through silicon vias (TSVs) connected to a patterned metal pad and a conductive structure on opposite ends of the TSVs. The pattern metal pad is embedded with dielectric structures to reduce dishing effect and has regions over TSVs that are free of the dielectric structures. The conductive structure has 2 or more TSVs. By using a patterned metal pad and 2 or more TSVs, the reliability and yield of the conductive structure and the 3DIC structure are improved.


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