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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9953836 B1

PDFFull Text
Date of Patent:
Apr. 24, 2018

Filed:

Jan. 28, 2015

Barrier layer above anti-punch through (apt) implant region to improve mobility of channel region of fin field effect transistor (finfet) device structure

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Tsung-Yao Wen, Hsinchu, TW;

Sheng-Chen Wang, Hsinchu, TW;

Sai-Hooi Yeong, Zhubei, TW;

Hsueh-Chang Sung, Zhubei, TW;

Ya-Yun Cheng, Taichung, TW;

Assignee:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Attorney:

Birch, Stewart, Kolasch & Birch, LLP

Primary Examiner:

Abul Kalam

Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/265 (2006.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 29/10 (2006.01); H01L 21/324 (2006.01); H01L 29/04 (2006.01); H01L 29/06 (2006.01); H01L 29/161 (2006.01); H01L 27/088 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/26513 (2013.01); H01L 21/324 (2013.01); H01L 21/823431 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 27/0924 (2013.01); H01L 27/1211 (2013.01); H01L 29/045 (2013.01); H01L 29/0653 (2013.01); H01L 29/1033 (2013.01); H01L 29/1054 (2013.01); H01L 29/1083 (2013.01); H01L 29/161 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01); H01L 27/0886 (2013.01); H01L 29/785 (2013.01);
Abstract

A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from the substrate. The FinFET device structure also includes an anti-punch through implant (APT) region formed in the fin structure and a barrier layer formed on the APT region. The barrier layer has a middle portion and a peripheral portion, and the middle portion is higher than the peripheral portion. The FinFET device structure further includes an epitaxial layer formed on the barrier layer.

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