The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2018

Filed:

Mar. 09, 2017
Applicant:

Globalfoundries Inc., Grand Cayman OT, KY;

Inventors:

Anthony I. Chou, Beacon, NY (US);

Judson R. Holt, Wappingers Falls, NY (US);

Arvind Kumar, Beacon, NY (US);

Henry K. Utomo, Newburgh, NY (US);

Assignee:

GLOBAL FOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/84 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01); H01L 21/306 (2006.01); H01L 29/165 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66636 (2013.01); H01L 21/30604 (2013.01); H01L 21/84 (2013.01); H01L 29/0649 (2013.01); H01L 29/0688 (2013.01); H01L 29/0847 (2013.01); H01L 29/1033 (2013.01); H01L 29/165 (2013.01); H01L 29/7848 (2013.01);
Abstract

The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a partially depleted semiconductor-on-insulator (SOI) junction isolation structure using a nonuniform trench shape formed by reactive ion etching (RIE) and crystallographic wet etching. The nonuniform trench shape may reduce back channel leakage by providing an effective channel directly below a gate stack having a width that is less than a width of an effective back channel directly above the isolation layer.


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