The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2018
Filed:
Nov. 16, 2015
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Kuo-Cheng Ching, Hsinchu County, TW;
Chung-Cheng Wu, Hsin-Chu County, TW;
Ching-Fang Huang, Taipei, TW;
Wen-Hsing Hsieh, Hsinchu, TW;
Ying-Keung Leung, Hong Kong, HK;
Cheng-Ting Chung, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsin-Chu, TW;
Abstract
A semiconductor includes a first transistor and a second transistor. The first transistor includes a first and a second epitaxial layer, formed of a first semiconductor material. The second epitaxial layer is disposed over the first epitaxial layer. The first transistor also includes a first gate dielectric layer surrounds the first and second epitaxial layers and extends from a top surface of the first epitaxial layer to a bottom surface of the second epitaxial layer and a first metal gate layer surrounding the first gate dielectric layer. The second transistor includes a third epitaxial layer formed of the first semiconductor material and a fourth epitaxial layer disposed directly on the third epitaxial layer and formed of a second semiconductor. The second transistor also includes a second gate dielectric layer disposed over the third and fourth epitaxial layers and a second metal gate layer disposed over the second gate dielectric layer.