The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2018

Filed:

Dec. 16, 2015
Applicant:

Stats Chippac, Ltd., Singapore, SG;

Inventors:

Reza A. Pagaila, Tangerang, ID;

Seng Guan Chow, Singapore, SG;

Seung Uk Yoon, Singapore, SG;

Byung Tai Do, Singapore, SG;

Linda Pei Ee Chua, Singapore, SG;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 25/10 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H01L 25/03 (2006.01); H01L 25/065 (2006.01); H01L 25/16 (2006.01); H01L 21/48 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 23/544 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/486 (2013.01); H01L 21/56 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/3128 (2013.01); H01L 23/3157 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 23/5384 (2013.01); H01L 23/5389 (2013.01); H01L 24/11 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 24/27 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/82 (2013.01); H01L 24/83 (2013.01); H01L 24/97 (2013.01); H01L 25/03 (2013.01); H01L 25/0655 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/16 (2013.01); H05K 1/186 (2013.01); H05K 3/007 (2013.01); H01L 23/295 (2013.01); H01L 23/3107 (2013.01); H01L 23/3121 (2013.01); H01L 23/544 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2221/68345 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/29 (2013.01); H01L 2224/29101 (2013.01); H01L 2224/29298 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/94 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1052 (2013.01); H01L 2924/00013 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01049 (2013.01); H01L 2924/01073 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/0665 (2013.01); H01L 2924/078 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/181 (2013.01); H05K 2201/10674 (2013.01);
Abstract

A semiconductor device has a first semiconductor die mounted over a carrier. An interposer frame has an opening in the interposer frame and a plurality of conductive pillars formed over the interposer frame. The interposer is mounted over the carrier and first die with the conductive pillars disposed around the die. A cavity can be formed in the interposer frame to contain a portion of the first die. An encapsulant is deposited through the opening in the interposer frame over the carrier and first die. Alternatively, the encapsulant is deposited over the carrier and first die and the interposer frame is pressed against the encapsulant. Excess encapsulant exits through the opening in the interposer frame. The carrier is removed. An interconnect structure is formed over the encapsulant and first die. A second semiconductor die can be mounted over the first die or over the interposer frame.


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