The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2018
Filed:
Apr. 25, 2017
Cypress Semiconductor Corporation, San Jose, CA (US);
Chun Chen, San Jose, CA (US);
Kuo-Tung Chang, Saratoga, CA (US);
Yoram Betser, Mazkeret Batya, IL;
Shivananda Shetty, San Jose, CA (US);
Giovanni Mazzeo, San Jose, CA (US);
Tio Wei Neo, Fremont, CA (US);
Pawan Singh, Santa Clara, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
Techniques for suppression of program disturb in memory devices are described herein. In an example embodiment, a memory device comprises a flash memory array coupled to a control circuit. The flash memory array comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). The control circuit is configured to regulate both a first voltage, of a selected SG line, and a second voltage, of an unselected BL, independently of a power supply voltage of the flash memory array, and to adjust at least one of the first voltage and the second voltage based on a measure of an operating temperature of the memory device.