The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2018

Filed:

Feb. 26, 2010
Applicants:

Reza A. Pagaila, Singapore, SG;

Yaojian Lin, Singapore, SG;

Jun MO Koo, Singapore, SG;

Heejo Chi, Kyoungki-do, KR;

Inventors:

Reza A. Pagaila, Singapore, SG;

Yaojian Lin, Singapore, SG;

Jun Mo Koo, Singapore, SG;

HeeJo Chi, Kyoungki-do, KR;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/13 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); H01L 25/10 (2006.01); H01L 25/16 (2006.01); H01L 23/00 (2006.01); H01L 23/552 (2006.01);
U.S. Cl.
CPC ...
H01L 21/56 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/13 (2013.01); H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 24/81 (2013.01); H01L 24/92 (2013.01); H01L 24/94 (2013.01); H01L 24/97 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/16 (2013.01); H01L 23/552 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/83 (2013.01); H01L 2221/68345 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/4816 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48157 (2013.01); H01L 2224/48158 (2013.01); H01L 2224/73203 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73259 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/81001 (2013.01); H01L 2224/812 (2013.01); H01L 2224/81801 (2013.01); H01L 2224/83 (2013.01); H01L 2224/97 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/0103 (2013.01); H01L 2924/01004 (2013.01); H01L 2924/014 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01019 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01049 (2013.01); H01L 2924/01073 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/09701 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/12044 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01); H01L 2924/157 (2013.01); H01L 2924/1532 (2013.01); H01L 2924/15151 (2013.01); H01L 2924/15174 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/181 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/30105 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor device has an interposer mounted over a carrier. The interposer includes TSV formed either prior to or after mounting to the carrier. An opening is formed in the interposer. The interposer can have two-level stepped portions with a first vertical conduction path through a first stepped portion and second vertical conduction path through a second stepped portion. A first and second semiconductor die are mounted over the interposer. The second die is disposed within the opening of the interposer. A discrete semiconductor component can be mounted over the interposer. A conductive via can be formed through the second die or encapsulant. An encapsulant is deposited over the first and second die and interposer. A portion of the interposer can be removed to that the encapsulant forms around a side of the semiconductor device. An interconnect structure is formed over the interposer and second die.


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