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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9871137 B1

PDFFull Text
Date of Patent:
Jan. 16, 2018

Filed:

Oct. 24, 2016

Method for forming semiconductor device structure

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Shin-Yeh Huang, Taichung, TW;

Kai-Hsiang Chang, Taichung, TW;

Chih-Chen Jiang, New Taipei, TW;

Yi-Wei Peng, Taichung, TW;

Kuan-Yu Lin, Taichung, TW;

Ming-Shan Tsai, Xizhou Township, TW;

Ching-Lun Lai, Taichung, TW;

Assignee:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Attorney:

Birch, Stewart, Kolasch & Birch, LLP

Primary Examiner:

Phuc Dang

Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/04 (2006.01); H01L 21/225 (2006.01); H01L 21/306 (2006.01); H01L 23/535 (2006.01); H01L 29/06 (2006.01); H01L 29/36 (2006.01); H01L 29/165 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7845 (2013.01); H01L 21/2253 (2013.01); H01L 21/30604 (2013.01); H01L 23/535 (2013.01); H01L 29/045 (2013.01); H01L 29/0649 (2013.01); H01L 29/1083 (2013.01); H01L 29/36 (2013.01); H01L 29/6656 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 29/7848 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 29/165 (2013.01); H01L 29/665 (2013.01);
Abstract

The semiconductor device structures are provided. The semiconductor device structure includes a gate stack structure formed on a substrate and an isolation structure formed in the substrate. The semiconductor device structure further includes a source/drain stressor structure formed between the gate stack structure and the isolation structure and a metal silicide layer formed on the source/drain stressor structure. A portion of the metal silicide layer is below a top surface of the isolation structure.

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