The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Jun. 04, 2015
Applicant:

Shinko Electric Industries Co., Ltd., Nagano-Ken, JP;

Inventors:

Noriyoshi Shimizu, Nagano, JP;

Kiyoshi Oi, Nagano, JP;

Yuichiro Shimizu, Nagano, JP;

Assignee:

Shinko Electric Industries Co., Ltd., Nagano-shi, Nagano-ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H05K 1/03 (2006.01); H05K 1/09 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H05K 1/0306 (2013.01); H05K 1/0326 (2013.01); H05K 1/0346 (2013.01); H05K 1/09 (2013.01); H05K 1/181 (2013.01); H05K 3/0023 (2013.01); H05K 3/0055 (2013.01); H05K 3/0094 (2013.01); H01L 23/49833 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/15174 (2013.01); H01L 2924/15311 (2013.01); H05K 2201/0141 (2013.01); H05K 2201/0154 (2013.01); Y10T 29/49167 (2015.01);
Abstract

A wiring substrate includes a first wiring structure and a second wiring structure stacked thereon. The first wiring structure includes a first insulation layer and a via wiring extending through the first insulation layer. The second wiring structure includes a first wiring layer formed on the first insulation layer and the via wiring, and a first plane layer stacked on the first insulation layer and at least partially grid-shaped in a plan view to define second through holes. A second insulation layer is stacked on the first insulation layer to fill the second through holes and cover the first plane layer and the first wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The second through holes each include a lower open end and an upper open end having a smaller open width than the lower open end.


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