The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2017

Filed:

Mar. 25, 2016
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Jungrae Park, Santa Clara, CA (US);

Wei-Sheng Lei, San Jose, CA (US);

James S. Papanu, San Rafael, CA (US);

Brad Eaton, Menlo Park, CA (US);

Ajay Kumar, Cupertino, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/544 (2006.01); H01L 21/78 (2006.01); B23K 26/359 (2014.01); B23K 26/064 (2014.01); B23K 26/364 (2014.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); B23K 26/064 (2015.10); B23K 26/359 (2015.10); B23K 26/364 (2015.10); H01L 21/78 (2013.01); H01L 2223/5446 (2013.01);
Abstract

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a rotating laser beam laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.


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