The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2017

Filed:

Feb. 15, 2016
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Kuan-Yu Lin, Hsinchu County, TW;

Chin-Her Chien, Taoyuan County, TW;

Ji-Jan Chen, Kaosiung, TW;

Jung-Rung Jiang, Tao-Yuan, TW;

Wei-Pin Changchien, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 25/065 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 21/66 (2006.01); H01L 23/525 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/76892 (2013.01); H01L 21/76895 (2013.01); H01L 22/12 (2013.01); H01L 22/14 (2013.01); H01L 22/22 (2013.01); H01L 23/525 (2013.01); H01L 23/5226 (2013.01); H01L 23/481 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Provided is a monolithic stacked integrated circuit (IC). The IC includes a first layer over a substrate and a second layer over the first layer. The first layer includes first circuit elements where a first portion of the first circuit elements has a defect. The second layer includes second circuit elements. The IC further includes interconnect elements coupling the first portion to a second portion of the second circuit elements for mitigating the defect.


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