The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2017

Filed:

Jul. 30, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Sheng-Hsiung Chen, Hsinchu, TW;

Jyun-Hao Chang, Hsinchu, TW;

Ting-Wei Chiang, New Taipei, TW;

Fong-Yuan Chang, Hsinchu, TW;

I-Lun Tseng, Hsinchu, TW;

Po-Hsiang Huang, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5077 (2013.01);
Abstract

A method of global connection routing includes determining a global connection tolerance of a cell for use in a circuit layout, wherein the cell comprises a plurality of pins, and a plurality of routing tracks are defined with respect to the cell. The method further includes determining a number of blocked tracks within the cell. The method further includes comparing the global connection tolerance with the number of blocked tracks. The method further includes adjusting a location of the cell within the circuit layout if the global connection tolerance and the number of blocked tracks fail to satisfy a predetermined condition.


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