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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9842825 B1

PDFFull Text
Date of Patent:
Dec. 12, 2017

Filed:

Sep. 05, 2014

Substrateless integrated circuit packages and methods of forming same

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Lin-Chih Huang, Hsin-Chu, TW;

Hung-An Teng, Taoyuan, TW;

Hsin-Yu Chen, Taipei, TW;

Tsang-Jiuh Wu, Hsin-Chu, TW;

Cheng-Chieh Hsieh, Tainan, TW;

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Phat X Cao

Assistant Examiner:

Mohammad M Hoque

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 21/683 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 23/14 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 21/6835 (2013.01); H01L 21/78 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/5389 (2013.01); H01L 24/03 (2013.01); H01L 24/17 (2013.01); H01L 24/96 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/145 (2013.01); H01L 23/3114 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68359 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05026 (2013.01); H01L 2224/05082 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05184 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05684 (2013.01); H01L 2224/1146 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/81001 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/92124 (2013.01); H01L 2224/96 (2013.01); H01L 2224/97 (2013.01); H01L 2924/00011 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/18162 (2013.01);
Abstract

Integrated circuit packages and methods of forming the same are provided. One or more redistribution layers are formed on a carrier. First connectors are formed on a first side of the RDLs. Dies are bonded to the first side of the RDLs using the first connectors. An encapsulant is formed on the first side of the RDLs around the dies. The carrier is de-bonded from the overlaying structure and second connectors are formed on a second side of the RDLs. The resulting structure in diced to form individual packages.

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