The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Jul. 13, 2015
Applicant:

Globalfoundries, Inc., Grand Cayman, KY;

Inventors:

Xinyuan Dou, Clifton Park, NY (US);

Sukwon Hong, Albany, NY (US);

Satyajit Shinde, Ballston Lake, NY (US);

Sandeep Gaan, Clifton Park, NY (US);

Tao Han, Clifton Park, NY (US);

Carlos Chacon, Wilton, NY (US);

Shimpei Yamaguchi, Ballston Lake, NY (US);

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3105 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3105 (2013.01); H01L 21/76229 (2013.01); H01L 29/42356 (2013.01); H01L 29/66795 (2013.01);
Abstract

Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an isolation trench between two fin structures on an integrated circuit substrate, forming a flowable film in the isolation trench using a flowable chemical vapor deposition process, and annealing the flowable film to form a silicon oxide dielectric layer in the isolation trench. The annealing is performed at a temperature of less than about 200° C. with a process gas including Nand HO.


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