The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Dec. 18, 2016
Applicant:

Netspeed Systems, Inc., San Jose, CA (US);

Inventors:

Rimu Kaushal, San Jose, CA (US);

Anup Gangwar, San Jose, CA (US);

Vishnu Mohan Pusuluri, San Jose, CA (US);

Sailesh Kumar, San Jose, CA (US);

Assignee:

NetSpeed Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 1/26 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); G06F 1/26 (2013.01); G06F 1/3203 (2013.01);
Abstract

Aspects of the present disclosure relate to a method and system for hybrid and/or distributed implementation of generation and/or execution of power profile management instructions. An embodiment of the present disclosure provides a hardware element of a SoC/NoC that can be configured to generate and/or execute power profile management instructions using a hybrid combination of software and hardware, wherein the hardware element can be run in parallel with other hardware elements of the SoC/NoC to generate and execute power profile management instructions for different segments or regions of the SoC/NoC for efficient and safe working thereof.


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