The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2017
Filed:
Oct. 09, 2015
Globalfoundries Inc., Grand Cayman, KY;
Emre Alptekin, Wappingers Falls, NY (US);
Lars W. Liebmann, Poughquag, NY (US);
Injo Ok, Loudonville, NY (US);
Balasubramanian Pranatharthiharan, Watervliet, NY (US);
Ravikumar Ramachandran, Pleasantville, NY (US);
Soon-Cheon Seo, Glenmont, NY (US);
Charan V. V. S. Surisetty, Clifton Park, NY (US);
Mickey H. Yu, Essex Junction, VT (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
Various embodiments include methods and integrated circuit structures. In some cases, a method of forming an integrated circuit structure can include: forming a doped silicon layer over a substrate; forming a plurality of fin structures from the doped silicon layer; forming a plurality of gate structures over the plurality of fin structures, each of the plurality of gate structures separated from a neighboring gate structure by a first pitch; forming a mask over the plurality of gate structures, exposing at least one of the plurality of gate structures; removing the at least one of the plurality of gate structures, wherein two of the remaining gate structures after the removing are separated by a second pitch larger than the first pitch; and forming an epitaxial region over the substrate between the two of the remaining gate structures.