The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2017

Filed:

Apr. 07, 2016
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Chun-Hsien Huang, Tainan, TW;

Yung-Feng Cheng, Kaohsiung, TW;

Yu-Tse Kuo, Tainan, TW;

Chia-Wei Huang, Kaohsiung, TW;

Li-Ping Huang, Miaoli County, TW;

Shu-Ru Wang, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 27/11 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1104 (2013.01);
Abstract

A semiconductor layout structure includes a substrate comprising a cell edge region and a dummy region abutting thereto, a plurality of dummy contact patterns disposed in the dummy region and arranged along a first direction, and a plurality of dummy gate patterns disposed in the dummy region and arranged along the first direction. The dummy contact patterns and the dummy gate patterns are alternately arranged. Each dummy contact pattern includes an inner dummy contact proximal to the cell edge region and an outer dummy contact distal to the cell edge region, and the inner dummy contact and the outer dummy contact are arranged along a second direction perpendicular to the first direction and spaced apart from each other by a first gap.


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