The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Dec. 30, 2015
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Liming Li, Singapore, SG;

Shaoqiang Zhang, Singapore, SG;

Purakh Raj Verma, Singapore, SG;

Han Xiao, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/336 (2006.01); H01L 29/78 (2006.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01); H01L 29/10 (2006.01); H01L 29/06 (2006.01); H01L 21/308 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7824 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/3081 (2013.01); H01L 21/76283 (2013.01); H01L 21/76897 (2013.01); H01L 29/0649 (2013.01); H01L 29/1095 (2013.01); H01L 29/66681 (2013.01);
Abstract

Devices and methods for forming a device are disclosed. The method includes providing a crystalline-on-insulator substrate having a bulk substrate and a surface substrate separated by a buried insulator layer. The surface substrate is defined with a device region. A transistor having a gate is formed in the device region. A first diffusion region is formed adjacent to a first side of the gate and a second diffusion region is formed adjacent to and displaced away from a second side of the gate. At least a first drift isolation region is formed in the surface substrate adjacent to and underlaps the second side of the gate. A drift well is formed in the surface substrate encompassing the first drift isolation region. A device isolation region surrounding the device region is formed in the surface substrate. The device isolation region includes a second depth which is deeper than a first depth of the first drift isolation region.


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