The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
Dec. 18, 2013
Applicants:
Tu-anh N. Tran, Austin, TX (US);
Kurt H. Junker, Austin, TX (US);
Inventors:
Tu-Anh N. Tran, Austin, TX (US);
Kurt H. Junker, Austin, TX (US);
Assignee:
NXP USA, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/00 (2006.01); H01L 21/66 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/03 (2013.01); H01L 22/32 (2013.01); H01L 23/3157 (2013.01); H01L 24/05 (2013.01); H01L 24/43 (2013.01); H01L 24/48 (2013.01); H01L 24/45 (2013.01); H01L 24/85 (2013.01); H01L 2224/02166 (2013.01); H01L 2224/0391 (2013.01); H01L 2224/0392 (2013.01); H01L 2224/03622 (2013.01); H01L 2224/03831 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05017 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05557 (2013.01); H01L 2224/05558 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/43 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48453 (2013.01); H01L 2224/48458 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/48507 (2013.01); H01L 2224/48824 (2013.01); H01L 2224/48847 (2013.01); H01L 2224/85181 (2013.01); H01L 2224/85365 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10271 (2013.01); H01L 2924/10329 (2013.01); H01L 2924/181 (2013.01);
Abstract
A method for forming a semiconductor structure includes forming a bond pad over a last metal layer of the semiconductor structure wherein the bond pad includes a wire bond region; and recessing the wire bond region such that the wire bond region has a first thickness and a region of the bond pad outside the wire bond region has a second thickness that is greater than the first thickness.