The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Jan. 22, 2016
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Chien-Hsun Wang, Hsinchu, TW;

Mao-Lin Huang, Hsinchu, TW;

Chun-Hsiung Lin, Hsinchu County, TW;

Jean-Pierre Colinge, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/775 (2006.01); H01L 29/66 (2006.01); H01L 21/311 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0676 (2013.01); H01L 21/31144 (2013.01); H01L 29/0669 (2013.01); H01L 29/401 (2013.01); H01L 29/41791 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66545 (2013.01); H01L 29/66772 (2013.01); H01L 29/775 (2013.01); H01L 29/785 (2013.01); H01L 29/78696 (2013.01); H01L 2029/7858 (2013.01);
Abstract

Transistor devices and methods for forming transistor devices are provided. A transistor device includes a semiconductor substrate and a device layer. The device layer includes a source region and a drain region connected by a suspended nanowire channel. First and second etch stop layers are respectively arranged beneath the source region and the drain region. Each of the etch stop layers forms a support structure interposed between the semiconductor substrate and the respective source and drain regions.


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