The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Mar. 02, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Takashi Ando, Tuckahoe, NY (US);

Hemanth Jagannathan, Niskayuna, NY (US);

Balaji Kannan, Fishkill, NY (US);

Siddarth A. Krishnan, Newark, CA (US);

Unoh Kwon, Fishkill, NY (US);

Rekha Rajaram, Scarsdale, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/8234 (2006.01); H01L 21/3213 (2006.01); H01L 21/28 (2006.01); H01L 21/321 (2006.01); H01L 21/033 (2006.01); H01L 21/225 (2006.01); H01L 21/311 (2006.01); H01L 21/3115 (2006.01); H01L 21/324 (2006.01); H01L 29/66 (2006.01); H01L 29/49 (2006.01); H01L 21/8238 (2006.01); H01L 21/027 (2006.01); H01L 21/02 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823462 (2013.01); H01L 21/0273 (2013.01); H01L 21/02321 (2013.01); H01L 21/0332 (2013.01); H01L 21/225 (2013.01); H01L 21/28079 (2013.01); H01L 21/28088 (2013.01); H01L 21/28185 (2013.01); H01L 21/28194 (2013.01); H01L 21/28229 (2013.01); H01L 21/3115 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/324 (2013.01); H01L 21/32115 (2013.01); H01L 21/32133 (2013.01); H01L 21/32134 (2013.01); H01L 21/32135 (2013.01); H01L 21/32139 (2013.01); H01L 21/82345 (2013.01); H01L 21/823437 (2013.01); H01L 21/823842 (2013.01); H01L 21/823857 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/66545 (2013.01); H01L 29/513 (2013.01);
Abstract

A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly or indirectly by using layers composed of multi-layer thin film stacks, or in other embodiments, by a single blocking layer. By taking advantage of unexpected etch selectivity of the multi-layer stack or the controlled etch process of a single layer stack, etch damage to the high-k may be avoided and work function metal thicknesses can be tightly controlled which in turn allows field effect transistors with low Tinv (inverse of gate capacitance) mismatch.


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