The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2017
Filed:
Dec. 03, 2013
Siltronic Ag, Munich, DE;
Intel Corporation, Santa Clara, CA (US);
Peter Storck, Burghausen, DE;
Norbert Werner, Tengling, DE;
Martin Vorderwestner, Unterreit, DE;
Peter Tolchinsky, Beaverton, OR (US);
Irwin Yablok, Portland, OR (US);
Siltronic AG, Munich, DE;
Intel Corporation, Santa Clara, CA (US);
Abstract
An epitaxial wafer comprises a silicon substrate wafer having first and second sides, and a silicon epitaxial layer deposited on the first side, and optionally one or more additional epitaxial layers on top of the silicon epitaxial layer, at least one of the silicon epitaxial layer or at least one of the one or more additional epitaxial layers being doped with nitrogen at a concentration of 1×10atoms/cmor more and 1×10atoms/cmor less. The epitaxial wafer is produced by depositing the silicon epitaxial layer and/or at least one of the one or more additional epitaxial layers, at a deposition temperature of 940° C. or less through chemical vapor deposition in the presence of a deposition gas atmosphere containing one or more silicon precursor compounds and one or more nitrogen precursor compounds.